Top semiconductor manufacturer TSMC using Nvidia accelerated computing and AI to advance semiconductor design and manufacturing.

As chips move to more advanced nodes, bringing them from design to high-volume production has become one of the world’s most complex computing challenges. Computational lithography, transistor simulation, process control and wafer inspection now require massive-scale simulation and real-time optimisation, and AI systems that can provide support across physics, images and other applications.

TSMC is using Nvidia technologies to accelerate this transformation, applying accelerated computing and AI across the semiconductor design and manufacturing lifecycle to improve turnaround time, energy efficiency, yield and operational productivity in advanced fabs.

“Nvidia and TSMC have worked together for nearly three decades to push the limits of computing,” says Jensen Huang, founder and CEO of Nvidia. “TSMC is bringing Nvidia AI and accelerated computing into the fab itself, tackling some of the world’s most complex design and manufacturing challenges with simulation, optimization and AI to improve speed, efficiency and yield for the next generation of chips.”

“TSMC and Nvidia have built a long-standing partnership rooted in advancing the technologies that make the next generation of computing possible,” says CC Wei, chairman and CEO of TSMC. “By using Nvidia accelerated computing and AI across fab operations optimization, lithography, process control and inspection, TSMC is strengthening our technology leadership and manufacturing excellence to support our customers’ future products and success.”

 

Accelerated processes

Advanced semiconductor design and manufacturing require massive computational workloads and highly coordinated fab operations, spanning chip-design transfer, transistor modeling, process control and fab productivity.

TSMC is using Nvidia CUDA-X libraries and AI models to accelerate these workloads on Nvidia GPUs:

  • Computational lithography: TSMC is using Nvidia cuLitho, a GPU-accelerated library for lithography — a printing method for chip mask design. This technology delivers a 20% to 50% improvement in cost effectiveness or cycle time compared with CPU-based computational lithography, while maintaining the same cost of ownership.
  • Transistor, equipment and process simulation: TSMC is using Nvidia cuEST, a GPU-accelerated electronic structure simulation library for 50x faster chemistry simulations, on average, for semiconductor material design.
  • Advanced process control: TSMC is using the Nvidia cuML machine learning library to accelerate large-scale analytics on Nvidia GPUs. This lets TSMC speed algorithms and distill hundreds of thousands of process parameters spanning thousands of steps as precision inputs for machine learning models — making significant reduction in process variation.
  • Fab operations optimisation: GPU-accelerated scheduling computation using CUDA has led to notable improvements in fab productivity with Nvidia H200 GPUs. By harnessing CUDA-powered computation on Nvidia H200 GPUs, TSMC has enhanced its capability to manage complex constraints, thereby streamlining production paths and maximizing fab productivity.

 

Advanced defect inspection

As chips become more advanced, even the smallest defects can affect quality and yield, making faster and more accurate inspection essential to semiconductor design and manufacturing.

TSMC is using the Nvidia Metropolis platform and Nvidia TAO Toolkit to improve advanced defect classification. Using vision AI, TSMC has improved detection of defects at nanometer scale.

These capabilities help TSMC improve quality inspection while reducing the need for repeated labeling and retraining as process conditions, inspection tools and defect types change.

 

Nvidia Omniverse builds FabTwin
Advanced semiconductor fabs are among the most complex fabs ever built, requiring precise coordination across tools, materials, robots, humans and facility systems.

TSMC is exploring Nvidia Omniverse™ libraries to build FabTwin, a virtual fab environment for evaluating process tool layouts and related simulation workflows. By testing design scenarios digitally before physical implementation, TSMC can compare complex configurations more flexibly and identify potential constraints earlier. This virtual-first approach vastly improves planning efficiency and accelerates critical decision-making before any physical or capital commitments are made.